Resume for Christy Devonport
Senior Hardware Engineer
Board and Logic Design
Special expertise in processor and memory designs

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Location - Philadelphia/Trenton region, commutable from Doylestown, Pennsylvania. PA, NJ


Professional Summary

Senior Hardware Engineer seeking to leverage 11 years of experience in hardware design in leadership role. In depth understanding of board design cycle: researched, designed, performed schematic capture, coded & simulated Verilog, analyzed timing, documented, debugged & verified prototypes. Supervised technicians and layout designers. Commercialized industry-leading InfiniBand products. Motivated, detail-oriented team player with strong communication and multi-tasking skills.

Significant Accomplishments
Technical Skills - Board and Logic Design
Leadership, Communication, and Teamwork Skills
Creative Problem Solver
Special Skills & Keyword Summary
Employment History
Education & Certifications
Professional Affiliations


Significant Accomplishments

Technical Skills - Board and Logic Design
- Upon joining QLogic team, quickly analyzed and contributed to 9024, 5000, and 9000 products, transforming faltering projects into successful deliverables, meeting design objectives and targeted delivery dates. Completed QLogic SilverStorm 9000 family product deliveries including final Spine and 9020 respins, with successful pilot and GA releases to Manufacturing. Supported qualification efforts, four corners testing, and DVT efforts to ensure successful release of 9024, 5000, and 9000 products.
- Drove design of key aspects of the QLogic Virtual I/O (VIO) Leaf development, including all management interfaces
- Designed Management and Microcontroller functionality for the IBM BladeCenter BCH Bridge project from concept and architectural development, schematic capture, supervision of layout, and successful bring-up. Researched and selected microcontroller development software and developed microcontroller code.
- Major hardware contributor in defining next generation system QLogic IB Director class systems, 12800 and derivatives. Coordinated complex team effort and drove to completion the development of the 12800 Product Requirements Document. Developed integrated system infrastructure to maximize common management features across 12800 line cards. As engineering lead, designed 12800 Management Shuttle card using complex Ethernet and I2C topologies.
- Designed manufacturing test fixtures for QLogic BCH bridges and 9k VIO/Leaf boards, supported software bring-up and development effort, and completed successful transition of fully functional test fixtures to Manufacturing. Developed procedure and training for programming microcontrollers.
- Designed Modular Processing Kernel (MPK) used by over 10 projects across multiple platforms including MSC 25000, GX 550, and CBX 500; successfully commercialized with Lucent GX 550® Multiservice WAN Switch. Researched, designed, performed schematic capture, documented, debugged and verified prototypes on GX 550 implementations of MPK and next generation MPKII. Designs utilized Intel Pentiums, North and Southbridge functionality, PC100/PC133 DIMMs, flash memory, FPGA and CPLD logic, PCI, Ethernet, and other features.
- Designed and simulated electrical interfaces and logic for United Defense Bradley M4 Command and Control Vehicle (C2V) and Bradley M7 Fire Support Team (BFIST) Vehicle. Integrated and tested vehicle communications equipment; designed MIL-STD-1553 bus configuration. Created turret and hull drawings, supervised build and electrical installation, and worked efficiently with cross functional team to ensure timely vehicle integration.
Leadership, Communication, and Teamwork Skills
- Generated quality designs by implementing key new processes for tracking and resolving errata for QLogic platform development team; facilitated improved communications and quality within the hardware team and organization by providing detailed review and oversight of engineering change order activity, organizing and coordinating design reviews, and creating specifications, design notes, procedures, and block diagrams.
- Managed the transition of SilverStorm’s Arena PLM into the QLogic corporate Agile system as KOP Project Lead, completing project successfully and on time. Coordinated resources, tested, performed troubleshooting, prepared data for migration, and interfaced to offsite QLogic and Agile team members. Supported IT back-end effort with Oracle system. Investigated and developed solutions to change control management issues.
- Demonstrated leadership skills at QLogic, Lucent, Stanford Telecom, and UDLP through: coordinating and managing design reviews; directing layout, test, and technician resources for various testing, debug, and rework efforts; guiding junior engineers with design activities; organizing and driving planning and requirements development efforts on new projects. Facilitated communication between groups to resolve issues ranging from parts shortages to footprint issues, from thermal considerations to JTAG testing. Active liaison with vendors to resolve varied component design issues and develop new requirements.
- Pro-actively improved dynamics of QLogic platform development team by providing a steady, positive attitude, maintaining a professional, collaborative approach in day-to-day interactions, and organizing team-building activities
- Developed first QLogic-SilverStorm Cisco Product Change Notice, a coordinated effort with Engineering, Quality, Technical Support, and Project Management
- Provided engineering support to QLogic Operations for successful manufacturing transition to Via Systems
Creative Problem Solver
- Successfully resolved critical PRs affecting QLogic SilverStorm 9000 family product. Resolved issues with the redundant management implementation. Implemented ACM FPGA I2C Helper logic to fix weak I2C signaling in long paths. Analyzed and provided timely resolution for VIO and Spine bulk fault and voltage rail issues.
- Lead engineer for pre-production development and bring-up on Lucent Core Switching Shelf for next generation Lucent MSC 25000™ Multiservice Packet Core Switch, focusing on Quad Port Card (QPORT). Resolved issues, supervised bring-up, and implemented respin and debug plan of QPORT, which provided the 1.5552 GHz optical interface between Service Shelves in the MSC 25000 and the Core Switch Fabric.
- Supported Lucent MPK from start through assorted integration projects. Provided design support for MPK integration into several host projects on multiple platforms; completed hand-off to Sustaining Group and assisted with questions and issues resolution. Supported Software Group in ongoing development and bug resolution; facilitated understanding of MPK behavior; reverse-engineered legacy shoot-shot design (redundancy reset feature).
- Re-designed MPK CPLD Verilog: improved and simulated complex reset logic; debugged and solved reset sequencing issue while minimizing re-spin and component impact; generated released code; presented and demonstrated resolution.
- Re-designed circuits and performed system integration & debug on Stanford Telecom Residential Gateway. Performed testing and analysis on prototype board with telephone to PCM conversion circuit. Worked with Software group to create code to control operation of DSLAC in telephone to PCM conversion circuit. Performed timing analysis and created new CPLD logic for SRAM interface.

Special Skills & Keyword Summary

Architected. Researched parts. Developed circuit and logic designs. Wrote specifications and design documentation. Performed schematic capture. Analyzed static timing. Created symbols. Generated netlists. Reviewed layout. Created bills of materials. Released boards. Designed and simulated logic. Released FPGA and CPLD code. Debugged prototypes. Performed hardware design verification and test (HVT/DVT). Created scripts. Logged board defects. Supervised and trained technicians; directed layout designers. Coordinated with Procurement, Operations, Mechanical, Software, Sustaining, Marketing, and Project Management. Liaised with vendors.

ConceptHDL. Orcad. Viewlogic. PowerView. EPD. Verilog. Synplicity. Altera’s Max+plusII. VerilogXL. Modelsim. Allegro. Timing Analysis. Quad Blast. Synopsis Motive. Perl. Visual Basic. Clearcase. CVS. UNIX. Documentum file control environment. Vantive tracking software. Arena & Agile PLM.

Experienced with a wide variety of lab instrumentation including oscilloscopes, logic analyzers, terminals, etc. Well-versed in PC environment, skilled with Microsoft Office, Visio, and other software. Knowledge of FPGA Design, Xilinx XACT, Oracle, XTK, PSPICE, C, Pascal, LabWindows, HTML, JavaScript, and CAD.


Employment History

2004 - Present QLogic Corporation, King of Prussia, PA Staff Hardware Engineer
2002 - 2004 Sabbatical, Doylestown, PA Writer
1998 - 2002 Lucent Technologies, Westford, MA Senior Hardware Engineer
1997 Stanford Telecom, Sunnyvale, CA Design Engineer
1995 - 1997 United Defense LP, San Jose, CA Associate Electrical Engineer

Education & Certifications

California Polytechnic State University, San Luis Obispo

Bachelor of Science Degree, June 1995
Major: Electronic Engineering, GPA: 3.864
Graduated with Summa Cum Laude Honors

CSU, International Programs, University of Bradford, UK,1991-92

UC Berkeley Extension, Fall 1996

Engineer-in-Training (EIT) 1997


Professional Affiliations

- Member of Institute of Electrical and Electronic Engineers (IEEE)

- Member of Society of Women Engineers (SWE)

- Member of Eta Kappa Nu Electrical Honor Society

- Member of Cardinal Key and Golden Key National Honor Societies


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Updated November 19, 2008.

©2008 Christy Devonport